Added register documentation for arm64
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@ -3,7 +3,7 @@ package arm
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import "git.urbach.dev/cli/q/src/cpu"
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const (
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X0 cpu.Register = iota
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X0 cpu.Register = iota // Function arguments and return values [0-7]
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X1
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X2
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X3
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@ -11,18 +11,18 @@ const (
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X5
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X6
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X7
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X8
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X9
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X8 // Indirect result location register (used to pass a pointer to a structure return value)
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X9 // Temporary registers (caller-saved, used for general computation) [9-15]
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X10
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X11
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X12
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X13
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X14
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X15
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X16
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X16 // Intra-procedure call scratch registers [16-17]
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X17
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X18
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X19
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X18 // Platform register (reserved by the platform ABI for thread-local storage)
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X19 // Callee-saved registers (must be preserved across function calls) [19-28]
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X20
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X21
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X22
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@ -32,14 +32,18 @@ const (
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X26
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X27
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X28
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FP // Frame pointer
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LR // Link register
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SP // Stack pointer
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ZR = SP // Zero register uses the same numerical value as SP
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FP // Frame pointer
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LR // Link register
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SP // Stack pointer
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)
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const (
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ZR = SP // Zero register uses the same numerical value as SP
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TMP = X28 // Temporary register for the assembler
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)
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var (
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GeneralRegisters = []cpu.Register{X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28}
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GeneralRegisters = []cpu.Register{X9, X10, X11, X12, X13, X14, X15, X16, X17, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28}
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InputRegisters = []cpu.Register{X0, X1, X2, X3, X4, X5}
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OutputRegisters = InputRegisters
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SyscallInputRegisters = []cpu.Register{X8, X0, X1, X2, X3, X4, X5}
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@ -113,9 +113,8 @@ func (c *compiler) ARM(x asm.Instruction) {
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operands := c.assembler.Param.MemoryNumber[x.Index]
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if operands.Address.OffsetRegister < 0 {
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tmp := arm.X28
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c.code = arm.MoveRegisterNumber(c.code, tmp, operands.Number)
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c.append(arm.StoreRegister(tmp, operands.Address.Base, int(operands.Address.Offset), operands.Address.Length))
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c.code = arm.MoveRegisterNumber(c.code, arm.TMP, operands.Number)
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c.append(arm.StoreRegister(arm.TMP, operands.Address.Base, int(operands.Address.Offset), operands.Address.Length))
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} else {
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panic("not implemented")
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}
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@ -155,9 +154,8 @@ func (c *compiler) ARM(x asm.Instruction) {
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if encodable {
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c.append(code)
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} else {
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tmp := arm.X28
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c.code = arm.MoveRegisterNumberMI(c.code, tmp, operand.Number)
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c.append(arm.AndRegisterRegister(operand.Register, operand.Register, tmp))
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c.code = arm.MoveRegisterNumberMI(c.code, arm.TMP, operand.Number)
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c.append(arm.AndRegisterRegister(operand.Register, operand.Register, arm.TMP))
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}
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case asm.TypeRegisterRegister:
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operand := c.assembler.Param.RegisterRegister[x.Index]
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@ -173,9 +171,8 @@ func (c *compiler) ARM(x asm.Instruction) {
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if encodable {
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c.append(code)
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} else {
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tmp := arm.X28
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c.code = arm.MoveRegisterNumberMI(c.code, tmp, operand.Number)
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c.append(arm.OrRegisterRegister(operand.Register, operand.Register, tmp))
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c.code = arm.MoveRegisterNumberMI(c.code, arm.TMP, operand.Number)
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c.append(arm.OrRegisterRegister(operand.Register, operand.Register, arm.TMP))
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}
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case asm.TypeRegisterRegister:
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operand := c.assembler.Param.RegisterRegister[x.Index]
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@ -191,9 +188,8 @@ func (c *compiler) ARM(x asm.Instruction) {
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if encodable {
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c.append(code)
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} else {
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tmp := arm.X28
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c.code = arm.MoveRegisterNumberMI(c.code, tmp, operand.Number)
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c.append(arm.XorRegisterRegister(operand.Register, operand.Register, tmp))
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c.code = arm.MoveRegisterNumberMI(c.code, arm.TMP, operand.Number)
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c.append(arm.XorRegisterRegister(operand.Register, operand.Register, arm.TMP))
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}
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case asm.TypeRegisterRegister:
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operand := c.assembler.Param.RegisterRegister[x.Index]
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@ -209,9 +205,8 @@ func (c *compiler) ARM(x asm.Instruction) {
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if encodable {
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c.append(code)
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} else {
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tmp := arm.X28
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c.code = arm.MoveRegisterNumber(c.code, tmp, operand.Number)
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c.append(arm.AddRegisterRegister(operand.Register, operand.Register, tmp))
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c.code = arm.MoveRegisterNumber(c.code, arm.TMP, operand.Number)
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c.append(arm.AddRegisterRegister(operand.Register, operand.Register, arm.TMP))
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}
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case asm.TypeRegisterRegister:
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operand := c.assembler.Param.RegisterRegister[x.Index]
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@ -227,9 +222,8 @@ func (c *compiler) ARM(x asm.Instruction) {
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if encodable {
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c.append(code)
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} else {
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tmp := arm.X28
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c.code = arm.MoveRegisterNumber(c.code, tmp, operand.Number)
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c.append(arm.SubRegisterRegister(operand.Register, operand.Register, tmp))
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c.code = arm.MoveRegisterNumber(c.code, arm.TMP, operand.Number)
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c.append(arm.SubRegisterRegister(operand.Register, operand.Register, arm.TMP))
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}
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case asm.TypeRegisterRegister:
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operand := c.assembler.Param.RegisterRegister[x.Index]
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@ -245,9 +239,8 @@ func (c *compiler) ARM(x asm.Instruction) {
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if encodable {
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c.append(code)
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} else {
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tmp := arm.X28
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c.code = arm.MoveRegisterNumber(c.code, tmp, operand.Number)
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c.append(arm.CompareRegisterRegister(operand.Register, tmp))
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c.code = arm.MoveRegisterNumber(c.code, arm.TMP, operand.Number)
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c.append(arm.CompareRegisterRegister(operand.Register, arm.TMP))
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}
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case asm.TypeRegisterRegister:
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operand := c.assembler.Param.RegisterRegister[x.Index]
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@ -270,18 +263,16 @@ func (c *compiler) ARM(x asm.Instruction) {
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c.append(arm.MulRegisterRegister(operand.Destination, operand.Destination, operand.Source))
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case asm.TypeRegisterNumber:
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operand := c.assembler.Param.RegisterNumber[x.Index]
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tmp := arm.X28
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c.code = arm.MoveRegisterNumber(c.code, tmp, operand.Number)
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c.append(arm.MulRegisterRegister(operand.Register, operand.Register, tmp))
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c.code = arm.MoveRegisterNumber(c.code, arm.TMP, operand.Number)
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c.append(arm.MulRegisterRegister(operand.Register, operand.Register, arm.TMP))
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}
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case asm.MODULO:
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switch x.Type {
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case asm.TypeRegisterRegister:
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operand := c.assembler.Param.RegisterRegister[x.Index]
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tmp := arm.X28
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c.append(arm.DivSigned(tmp, operand.Destination, operand.Source))
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c.append(arm.MultiplySubtract(operand.Destination, tmp, operand.Source, operand.Destination))
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c.append(arm.DivSigned(arm.TMP, operand.Destination, operand.Source))
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c.append(arm.MultiplySubtract(operand.Destination, arm.TMP, operand.Source, operand.Destination))
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case asm.TypeRegisterNumber:
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panic("not implemented")
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}
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