From ae928156c5b893daee1edc2fdb4c667a96781177 Mon Sep 17 00:00:00 2001 From: Eduard Urbach Date: Sun, 23 Mar 2025 12:57:05 +0100 Subject: [PATCH] Added register documentation for arm64 --- src/arm/Registers.go | 26 ++++++++++++++----------- src/asmc/ARM.go | 45 ++++++++++++++++++-------------------------- 2 files changed, 33 insertions(+), 38 deletions(-) diff --git a/src/arm/Registers.go b/src/arm/Registers.go index 9204b69..6277134 100644 --- a/src/arm/Registers.go +++ b/src/arm/Registers.go @@ -3,7 +3,7 @@ package arm import "git.urbach.dev/cli/q/src/cpu" const ( - X0 cpu.Register = iota + X0 cpu.Register = iota // Function arguments and return values [0-7] X1 X2 X3 @@ -11,18 +11,18 @@ const ( X5 X6 X7 - X8 - X9 + X8 // Indirect result location register (used to pass a pointer to a structure return value) + X9 // Temporary registers (caller-saved, used for general computation) [9-15] X10 X11 X12 X13 X14 X15 - X16 + X16 // Intra-procedure call scratch registers [16-17] X17 - X18 - X19 + X18 // Platform register (reserved by the platform ABI for thread-local storage) + X19 // Callee-saved registers (must be preserved across function calls) [19-28] X20 X21 X22 @@ -32,14 +32,18 @@ const ( X26 X27 X28 - FP // Frame pointer - LR // Link register - SP // Stack pointer - ZR = SP // Zero register uses the same numerical value as SP + FP // Frame pointer + LR // Link register + SP // Stack pointer +) + +const ( + ZR = SP // Zero register uses the same numerical value as SP + TMP = X28 // Temporary register for the assembler ) var ( - GeneralRegisters = []cpu.Register{X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28} + GeneralRegisters = []cpu.Register{X9, X10, X11, X12, X13, X14, X15, X16, X17, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28} InputRegisters = []cpu.Register{X0, X1, X2, X3, X4, X5} OutputRegisters = InputRegisters SyscallInputRegisters = []cpu.Register{X8, X0, X1, X2, X3, X4, X5} diff --git a/src/asmc/ARM.go b/src/asmc/ARM.go index 1d98cb1..a4d2347 100644 --- a/src/asmc/ARM.go +++ b/src/asmc/ARM.go @@ -113,9 +113,8 @@ func (c *compiler) ARM(x asm.Instruction) { operands := c.assembler.Param.MemoryNumber[x.Index] if operands.Address.OffsetRegister < 0 { - tmp := arm.X28 - c.code = arm.MoveRegisterNumber(c.code, tmp, operands.Number) - c.append(arm.StoreRegister(tmp, operands.Address.Base, int(operands.Address.Offset), operands.Address.Length)) + c.code = arm.MoveRegisterNumber(c.code, arm.TMP, operands.Number) + c.append(arm.StoreRegister(arm.TMP, operands.Address.Base, int(operands.Address.Offset), operands.Address.Length)) } else { panic("not implemented") } @@ -155,9 +154,8 @@ func (c *compiler) ARM(x asm.Instruction) { if encodable { c.append(code) } else { - tmp := arm.X28 - c.code = arm.MoveRegisterNumberMI(c.code, tmp, operand.Number) - c.append(arm.AndRegisterRegister(operand.Register, operand.Register, tmp)) + c.code = arm.MoveRegisterNumberMI(c.code, arm.TMP, operand.Number) + c.append(arm.AndRegisterRegister(operand.Register, operand.Register, arm.TMP)) } case asm.TypeRegisterRegister: operand := c.assembler.Param.RegisterRegister[x.Index] @@ -173,9 +171,8 @@ func (c *compiler) ARM(x asm.Instruction) { if encodable { c.append(code) } else { - tmp := arm.X28 - c.code = arm.MoveRegisterNumberMI(c.code, tmp, operand.Number) - c.append(arm.OrRegisterRegister(operand.Register, operand.Register, tmp)) + c.code = arm.MoveRegisterNumberMI(c.code, arm.TMP, operand.Number) + c.append(arm.OrRegisterRegister(operand.Register, operand.Register, arm.TMP)) } case asm.TypeRegisterRegister: operand := c.assembler.Param.RegisterRegister[x.Index] @@ -191,9 +188,8 @@ func (c *compiler) ARM(x asm.Instruction) { if encodable { c.append(code) } else { - tmp := arm.X28 - c.code = arm.MoveRegisterNumberMI(c.code, tmp, operand.Number) - c.append(arm.XorRegisterRegister(operand.Register, operand.Register, tmp)) + c.code = arm.MoveRegisterNumberMI(c.code, arm.TMP, operand.Number) + c.append(arm.XorRegisterRegister(operand.Register, operand.Register, arm.TMP)) } case asm.TypeRegisterRegister: operand := c.assembler.Param.RegisterRegister[x.Index] @@ -209,9 +205,8 @@ func (c *compiler) ARM(x asm.Instruction) { if encodable { c.append(code) } else { - tmp := arm.X28 - c.code = arm.MoveRegisterNumber(c.code, tmp, operand.Number) - c.append(arm.AddRegisterRegister(operand.Register, operand.Register, tmp)) + c.code = arm.MoveRegisterNumber(c.code, arm.TMP, operand.Number) + c.append(arm.AddRegisterRegister(operand.Register, operand.Register, arm.TMP)) } case asm.TypeRegisterRegister: operand := c.assembler.Param.RegisterRegister[x.Index] @@ -227,9 +222,8 @@ func (c *compiler) ARM(x asm.Instruction) { if encodable { c.append(code) } else { - tmp := arm.X28 - c.code = arm.MoveRegisterNumber(c.code, tmp, operand.Number) - c.append(arm.SubRegisterRegister(operand.Register, operand.Register, tmp)) + c.code = arm.MoveRegisterNumber(c.code, arm.TMP, operand.Number) + c.append(arm.SubRegisterRegister(operand.Register, operand.Register, arm.TMP)) } case asm.TypeRegisterRegister: operand := c.assembler.Param.RegisterRegister[x.Index] @@ -245,9 +239,8 @@ func (c *compiler) ARM(x asm.Instruction) { if encodable { c.append(code) } else { - tmp := arm.X28 - c.code = arm.MoveRegisterNumber(c.code, tmp, operand.Number) - c.append(arm.CompareRegisterRegister(operand.Register, tmp)) + c.code = arm.MoveRegisterNumber(c.code, arm.TMP, operand.Number) + c.append(arm.CompareRegisterRegister(operand.Register, arm.TMP)) } case asm.TypeRegisterRegister: operand := c.assembler.Param.RegisterRegister[x.Index] @@ -270,18 +263,16 @@ func (c *compiler) ARM(x asm.Instruction) { c.append(arm.MulRegisterRegister(operand.Destination, operand.Destination, operand.Source)) case asm.TypeRegisterNumber: operand := c.assembler.Param.RegisterNumber[x.Index] - tmp := arm.X28 - c.code = arm.MoveRegisterNumber(c.code, tmp, operand.Number) - c.append(arm.MulRegisterRegister(operand.Register, operand.Register, tmp)) + c.code = arm.MoveRegisterNumber(c.code, arm.TMP, operand.Number) + c.append(arm.MulRegisterRegister(operand.Register, operand.Register, arm.TMP)) } case asm.MODULO: switch x.Type { case asm.TypeRegisterRegister: operand := c.assembler.Param.RegisterRegister[x.Index] - tmp := arm.X28 - c.append(arm.DivSigned(tmp, operand.Destination, operand.Source)) - c.append(arm.MultiplySubtract(operand.Destination, tmp, operand.Source, operand.Destination)) + c.append(arm.DivSigned(arm.TMP, operand.Destination, operand.Source)) + c.append(arm.MultiplySubtract(operand.Destination, arm.TMP, operand.Source, operand.Destination)) case asm.TypeRegisterNumber: panic("not implemented") }