Added more tests

This commit is contained in:
2025-03-24 23:17:51 +01:00
parent ae928156c5
commit 33b91e7bf4
4 changed files with 26 additions and 6 deletions

View File

@ -27,3 +27,19 @@ func TestCompareRegisterNumber(t *testing.T) {
assert.DeepEqual(t, code, pattern.Code)
}
}
func TestCompareRegisterRegister(t *testing.T) {
usagePatterns := []struct {
Left cpu.Register
Right cpu.Register
Code uint32
}{
{arm.X0, arm.X1, 0xEB01001F},
}
for _, pattern := range usagePatterns {
t.Logf("cmp %s, %s", pattern.Left, pattern.Right)
code := arm.CompareRegisterRegister(pattern.Left, pattern.Right)
assert.DeepEqual(t, code, pattern.Code)
}
}

View File

@ -13,9 +13,7 @@ func LoadRegister(destination cpu.Register, base cpu.Register, offset int, lengt
return 0b01111<<27 | common
case 4:
return 0b10111<<27 | common
case 8:
default:
return 0b11111<<27 | common
}
panic("invalid length")
}

View File

@ -15,9 +15,7 @@ func StoreRegister(source cpu.Register, base cpu.Register, offset int, length by
return 0b01111<<27 | common
case 4:
return 0b10111<<27 | common
case 8:
default:
return 0b11111<<27 | common
}
panic("invalid length")
}

View File

@ -27,4 +27,12 @@ func TestNotEncodable(t *testing.T) {
assert.False(t, encodable)
_, encodable = arm.XorRegisterNumber(arm.X0, arm.X0, -1)
assert.False(t, encodable)
_, encodable = arm.AddRegisterNumber(arm.X0, arm.X0, 0xFFFF)
assert.False(t, encodable)
_, encodable = arm.AddRegisterNumber(arm.X0, arm.X0, 0xF0000000)
assert.False(t, encodable)
_, encodable = arm.SubRegisterNumber(arm.X0, arm.X0, 0xFFFF)
assert.False(t, encodable)
_, encodable = arm.SubRegisterNumber(arm.X0, arm.X0, 0xF0000000)
assert.False(t, encodable)
}