Improved documentation

src/arm/Mul.go

@@ -7,7 +7,7 @@ func MulRegisterRegister(destination cpu.Register, multiplicand cpu.Register, mu
 	return 0b10011011000<<21 | reg4(destination, multiplicand, multiplier, ZR)
 }
 
-// MultiplySubtract multiplies `multiplicand` with `multiplier`, subtracts `minuend` and saves the result in `destination`.
+// MultiplySubtract multiplies `multiplicand` with `multiplier`, subtracts the product from `minuend` and saves the result in `destination`.
 func MultiplySubtract(destination cpu.Register, multiplicand cpu.Register, multiplier cpu.Register, minuend cpu.Register) uint32 {
 	return 0b10011011000<<21 | 1<<15 | reg4(destination, multiplicand, multiplier, minuend)
 }

src/arm/Mul_test.go

@@ -34,6 +34,7 @@ func TestMultiplySubtract(t *testing.T) {
 		Code        uint32
 	}{
 		{arm.X0, arm.X1, arm.X2, arm.X3, 0x9B028C20},
+		{arm.X3, arm.X0, arm.X2, arm.X1, 0x9B028403},
 	}
 
 	for _, pattern := range usagePatterns {

src/riscv/Registers.go

@@ -3,41 +3,41 @@ package riscv
 import "git.urbach.dev/cli/q/src/cpu"
 
 const (
-	X0 cpu.Register = iota
-	X1
-	X2
-	X3
-	X4
-	X5
-	X6
-	X7
-	X8
-	X9
-	X10
-	X11
-	X12
-	X13
-	X14
-	X15
-	X16
-	X17
-	X18
-	X19
-	X20
-	X21
-	X22
-	X23
-	X24
-	X25
-	X26
-	X27
-	X28
-	X29
-	X30
-	X31
+	Zero cpu.Register = iota // hardwired zero
+	RA                       // return address
+	SP                       // stack pointer
+	GP                       // global pointer
+	TP                       // thread pointer
+	T0                       // temporary register 0
+	T1                       // temporary register 1
+	T2                       // temporary register 2
+	S0                       // saved register 0 / frame pointer
+	S1                       // saved register 1
+	A0                       // function argument 0 / return value 0
+	A1                       // function argument 1 / return value 1
+	A2                       // function argument 2
+	A3                       // function argument 3
+	A4                       // function argument 4
+	A5                       // function argument 5
+	A6                       // function argument 6
+	A7                       // function argument 7
+	S2                       // saved register 2
+	S3                       // saved register 3
+	S4                       // saved register 4
+	S5                       // saved register 5
+	S6                       // saved register 6
+	S7                       // saved register 7
+	S8                       // saved register 8
+	S9                       // saved register 9
+	S10                      // saved register 10
+	S11                      // saved register 11
+	T3                       // temporary register 3
+	T4                       // temporary register 4
+	T5                       // temporary register 5
+	T6                       // temporary register 6
 )
 
 var (
-	SyscallInputRegisters  = []cpu.Register{X17, X10, X11, X12, X13, X14, X15, X16}
-	SyscallOutputRegisters = []cpu.Register{X10, X11}
+	SyscallInputRegisters  = []cpu.Register{A7, A0, A1, A2, A3, A4, A5, A6}
+	SyscallOutputRegisters = []cpu.Register{A0, A1}
 )