Added more tests

2024-08-07 23:30:53 +02:00
parent 66569446b1
commit d624a5f895
16 changed files with 399 additions and 26 deletions
--- a/src/arch/riscv/Registers.go
+++ b/src/arch/riscv/Registers.go
@ -37,4 +37,4 @@ const (
 	X31
 )

-var SyscallArgs = []cpu.Register{X10, X11, X12, X13, X14, X15, X16}
+var SyscallInputRegisters = []cpu.Register{X10, X11, X12, X13, X14, X15, X16}