Added RISC-V to the todo list

This commit is contained in:
Eduard Urbach 2024-08-05 17:16:32 +02:00
parent 42f0367a94
commit cd1119add2
Signed by: akyoto
GPG Key ID: C874F672B1AF20C0
4 changed files with 43 additions and 4 deletions

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@ -165,8 +165,8 @@ This is what generates expressions from tokens.
### Architecture ### Architecture
- [ ] arm64 - [ ] arm64
- [ ] wasm - [ ] riscv
- [x] x86-64 - [x] x64
### Platform ### Platform

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@ -1,4 +1,4 @@
package register package arm64
import "git.akyoto.dev/cli/q/src/build/cpu" import "git.akyoto.dev/cli/q/src/build/cpu"

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@ -0,0 +1,40 @@
package riscv
import "git.akyoto.dev/cli/q/src/build/cpu"
const (
X0 cpu.Register = iota
X1
X2
X3
X4
X5
X6
X7
X8
X9
X10
X11
X12
X13
X14
X15
X16
X17
X18
X19
X20
X21
X22
X23
X24
X25
X26
X27
X28
X29
X30
X31
)
var SyscallArgs = []cpu.Register{X10, X11, X12, X13, X14, X15, X16}

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@ -29,6 +29,5 @@ func encode(code []byte, mod AddressMode, reg cpu.Register, rm cpu.Register, num
code = append(code, opCodes...) code = append(code, opCodes...)
code = append(code, ModRM(mod, byte(reg), byte(rm))) code = append(code, ModRM(mod, byte(reg), byte(rm)))
return code return code
} }