Fixed comparison with negative numbers on arm64
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@ -4,10 +4,20 @@ import "git.urbach.dev/cli/q/src/cpu"
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// AddRegisterNumber adds a number to a register.
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// AddRegisterNumber adds a number to a register.
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func AddRegisterNumber(destination cpu.Register, source cpu.Register, number int) uint32 {
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func AddRegisterNumber(destination cpu.Register, source cpu.Register, number int) uint32 {
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return addRegisterNumber(0b10, 0, destination, source, number)
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return addRegisterNumber(destination, source, number, 0)
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}
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}
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// AddRegisterRegister adds a register to a register.
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// AddRegisterRegister adds a register to a register.
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func AddRegisterRegister(destination cpu.Register, source cpu.Register, operand cpu.Register) uint32 {
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func AddRegisterRegister(destination cpu.Register, source cpu.Register, operand cpu.Register) uint32 {
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return addRegisterRegister(0b10, 0, destination, source, operand)
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return addRegisterRegister(destination, source, operand, 0)
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}
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// addRegisterNumber adds the register and optionally updates the condition flags based on the result.
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func addRegisterNumber(destination cpu.Register, source cpu.Register, number int, flags uint32) uint32 {
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return flags<<29 | 0b100100010<<23 | reg2imm(destination, source, number)
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}
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// addRegisterRegister adds the registers and optionally updates the condition flags based on the result.
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func addRegisterRegister(destination cpu.Register, source cpu.Register, operand cpu.Register, flags uint32) uint32 {
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return flags<<29 | 0b10001011000<<21 | reg3(destination, source, operand)
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}
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}
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@ -4,10 +4,14 @@ import "git.urbach.dev/cli/q/src/cpu"
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// CompareRegisterNumber is an alias for a subtraction that updates the conditional flags and discards the result.
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// CompareRegisterNumber is an alias for a subtraction that updates the conditional flags and discards the result.
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func CompareRegisterNumber(register cpu.Register, number int) uint32 {
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func CompareRegisterNumber(register cpu.Register, number int) uint32 {
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return addRegisterNumber(0b11, 1, ZR, register, number)
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if number < 0 {
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return addRegisterNumber(ZR, register, -number, 1)
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}
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return subRegisterNumber(ZR, register, number, 1)
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}
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}
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// CompareRegisterRegister is an alias for a subtraction that updates the conditional flags and discards the result.
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// CompareRegisterRegister is an alias for a subtraction that updates the conditional flags and discards the result.
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func CompareRegisterRegister(reg1 cpu.Register, reg2 cpu.Register) uint32 {
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func CompareRegisterRegister(reg1 cpu.Register, reg2 cpu.Register) uint32 {
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return addRegisterRegister(0b11, 1, ZR, reg1, reg2)
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return subRegisterRegister(ZR, reg1, reg2, 1)
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}
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}
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@ -15,6 +15,7 @@ func TestCompareRegisterNumber(t *testing.T) {
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Code uint32
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Code uint32
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}{
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}{
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{arm.X0, 1, 0xF100041F},
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{arm.X0, 1, 0xF100041F},
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{arm.X0, -1, 0xB100041F},
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}
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}
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for _, pattern := range usagePatterns {
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for _, pattern := range usagePatterns {
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@ -4,10 +4,20 @@ import "git.urbach.dev/cli/q/src/cpu"
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// SubRegisterNumber subtracts a number from the given register.
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// SubRegisterNumber subtracts a number from the given register.
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func SubRegisterNumber(destination cpu.Register, source cpu.Register, number int) uint32 {
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func SubRegisterNumber(destination cpu.Register, source cpu.Register, number int) uint32 {
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return addRegisterNumber(0b11, 0, destination, source, number)
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return subRegisterNumber(destination, source, number, 0)
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}
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}
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// SubRegisterRegister subtracts a register from a register.
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// SubRegisterRegister subtracts a register from a register.
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func SubRegisterRegister(destination cpu.Register, source cpu.Register, operand cpu.Register) uint32 {
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func SubRegisterRegister(destination cpu.Register, source cpu.Register, operand cpu.Register) uint32 {
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return addRegisterRegister(0b11, 0, destination, source, operand)
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return subRegisterRegister(destination, source, operand, 0)
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}
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// subRegisterNumber subtracts the register and optionally updates the condition flags based on the result.
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func subRegisterNumber(destination cpu.Register, source cpu.Register, number int, flags uint32) uint32 {
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return flags<<29 | 0b110100010<<23 | reg2imm(destination, source, number)
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}
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// subRegisterRegister subtracts the registers and optionally updates the condition flags based on the result.
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func subRegisterRegister(destination cpu.Register, source cpu.Register, operand cpu.Register, flags uint32) uint32 {
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return flags<<29 | 0b11001011000<<21 | reg3(destination, source, operand)
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}
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}
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@ -2,27 +2,19 @@ package arm
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import "git.urbach.dev/cli/q/src/cpu"
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import "git.urbach.dev/cli/q/src/cpu"
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// addRegisterNumber performs addition or subtraction on the given register
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// and optionally updates the condition flags based on the result.
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func addRegisterNumber(op uint32, flags uint32, destination cpu.Register, source cpu.Register, number int) uint32 {
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number &= 0b1111_1111_1111
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return op<<30 | flags<<29 | 0b100010<<23 | (uint32(number) << 10) | (uint32(source) << 5) | uint32(destination)
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}
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// addRegisterRegister performs addition or subtraction on the given registers
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// and optionally updates the condition flags based on the result.
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func addRegisterRegister(op uint32, flags uint32, destination cpu.Register, source cpu.Register, operand cpu.Register) uint32 {
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return op<<30 | flags<<29 | 0b01011000<<21 | reg3(destination, source, operand)
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}
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// memory encodes an instruction with a register, a base register and an offset.
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// memory encodes an instruction with a register, a base register and an offset.
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func memory(destination cpu.Register, base cpu.Register, offset int) uint32 {
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func memory(destination cpu.Register, base cpu.Register, imm9 int) uint32 {
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return uint32(offset&0b1_1111_1111)<<12 | uint32(base)<<5 | uint32(destination)
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return uint32(imm9&0b1_1111_1111)<<12 | uint32(base)<<5 | uint32(destination)
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}
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}
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// pair encodes an instruction using a register pair with memory.
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// pair encodes an instruction using a register pair with memory.
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func pair(reg1 cpu.Register, reg2 cpu.Register, base cpu.Register, offset int) uint32 {
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func pair(reg1 cpu.Register, reg2 cpu.Register, base cpu.Register, imm7 int) uint32 {
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return uint32(offset&0b111_1111)<<15 | uint32(reg2)<<10 | uint32(base)<<5 | uint32(reg1)
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return uint32(imm7&0b111_1111)<<15 | uint32(reg2)<<10 | uint32(base)<<5 | uint32(reg1)
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}
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// reg2imm encodes an instruction with 2 registers and an immediate.
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func reg2imm(d cpu.Register, n cpu.Register, imm12 int) uint32 {
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return uint32(imm12&0b1111_1111_1111)<<10 | uint32(n)<<5 | uint32(d)
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}
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}
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// reg3 encodes an instruction with 3 registers.
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// reg3 encodes an instruction with 3 registers.
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