diff --git a/src/arch/riscv/Registers.go b/src/arch/riscv/Registers.go index 5267be3..66bf189 100644 --- a/src/arch/riscv/Registers.go +++ b/src/arch/riscv/Registers.go @@ -37,4 +37,7 @@ const ( X31 ) -var SyscallInputRegisters = []cpu.Register{X10, X11, X12, X13, X14, X15, X16} +var ( + SyscallInputRegisters = []cpu.Register{X17, X10, X11, X12, X13, X14, X15, X16} + SyscallOutputRegisters = []cpu.Register{X10, X11} +)